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********** C-MOS SCSI PROTOCOL CONTROLLER
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SYM53CF92A-64QFP (1/3) IL22
48
45
40
35 GND
49 50 GND
VDD (+5 V)
GND
33
32 GND 30
55
GND 25
GND 60 VDD (+5 V) 64 GND GND 20
VDD (+5 V)
GND
GND
VDD (+5 V)
17
10
15 16
1
5
(VDD = +5 V) PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 I/O -- O I I -- I/O I/O I/O -- I/O I/O I/O -- I/O I/O I/O SIGNAL GND DREQ PIN NO. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 I/O -- I/O I/O I/O -- I/O I/O I/O I/O -- I/O I/O I/O I/O -- I/O SIGNAL VDD SD0 SD1 SD2 GND SD3 SD4 SD5 SD6 GND SD7 SDP PIN NO. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 I/O I/O I/O I/O -- I/O I/O I/O -- I O -- I I I I I SIGNAL PIN NO. 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 I/O I I -- I I I I/O I/O I/O I/O -- I/O I/O I/O I/O -- SIGNAL A0 A1 GND A2-DBRD A3-ALE
RST MSG
SEL GND
DACK DBWR
VDD DB0 DB1 DB2 GND DB3 DB4 DB5 GND DB6 DB7 DBP
CD REQ IO
VDD MODE
TESTIN
PAD0 PAD1 PAD2 PAD3 GND PAD4 PAD5 PAD6 PAD7 VDD
INT
GND RESET
ATN BSY
GND
WR RD CS
CLK
ACK
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SYM53CF92A-64QFP (2/3) INPUT A0, A1 A2 - DBRD A3 - ALE CLK
CS DACK DBWR
MODE
RD
RESET
TESTIN WR
OUTPUT DREQ
; ; ; ; ; ; ; ; ; ; ; ;
ADDRESS ADDRESS/READ SIGNAL FOR THE DMA DATA BUS ADDRESS CLOCK CHIP SELECT DMA ACKNOWLEDGE DMA WRITE SIGNAL MODE SELECT (PAD BUS/ADDRESS CONTROL BUS) REGISTER READ SIGNAL CHIP RESET TEST REGISTER WRITE SIGNAL
INT
; DMA REQUEST SIGNAL ; OPEN-DRAIN INTERRUPT SIGNAL
INPUT/OUTPUT ; SCSI I/O ACK ; OPEN-DRAIN OUTPUT, SCHMITT TRIGGER INPUT ATN ; OPEN-DRAIN SCSI I/O BSY ; SCSI PHASE SIGNAL CD DB0 - DB7 ; DMA DATA BUS DBP ; ODD PARITY FOR DB0-DB7 ; SCSI PHASE SIGNAL IO ; SCSI PHASE SIGNAL MSG PAD0 - PAD7 ; PROCESSOR ADDRESS-DATA BUS ; SCSI I/O REQ ; OPEN-DRAIN SCSI I/O RST SD0 - SD7 ; SCSI DATA BUS SDP ; SCSI DATA/PARITY OUTPUT BUS ; OPEN-DRAIN SCSI I/O SEL
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SYM53CF92A-64QFP (3/3)
2 6 - 8, 10 - 12, 14 -16 DREQ
DB0 - DB7, DBP
FIFO (16 x 9-bit) PARITY GENERATOR AND CHECKER STEERING LOGIC 24-bit TRANSFER COUNT
18 - 20, 22 - 25, 27 SD0 - SD7 39 38
53 - 58, 60 - 63 PAD0 - PAD7
CONFIGURATION REGISTERS 1-4
24-bit TRANSFER COUNTER
37
48 A DRIVERS STATUS REGISTER
35 34 33
DESTINATION ID SEQUENCER COMMAND REGISTER SYNC OFFSET SYNC PERIOD TIME OUT CLK CONVERSION
48 46
32 30 29 28
IO REQ CD SEL MSG RST ACK BSY ATN
SDP
INTERRUPT REGISTER
SEQUENCE STEP
SCSI CONTROL
SEQUENCE MODE
CLK
42
INT
RD 45 WR 47 CS 3 DACK
A3-ALE A2-DBRD A1 A0 53 52 50 49 4 41 44 54
READ/WRITE CONTROL
DBWR
MODE RESET
TESTIN

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